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Metal Gates for Dielectrics

Ilika and Applied Materials Join Forces to Develop a Novel Metal Gate Alloy Compatible with High k Dielectrics to Advance Complementary Metal-Oxide-Semiconductor (CMOS) Devices


The rapid improvement in the performance of CMOS devices over the last 40 years has only been possible due to the ever reducing dimensions of the key components within them. The consumer electronics market is being driven by the need for smaller and smaller devices, but with improved functionality.

However, the continued “scaling” of such devices is limited by the performance of the dielectric material within the transistor, SiO2. Each time the thickness of this material is reduced it comes closer to a fundamental limit, at which the device’s power consumption increases and device failure becomes more probable.

Therefore, alternative metal gate materials compatible with higher dielectric constants must be considered for future CMOS devices. The International Technology Roadmap for Semiconductors has also cited that the development of suitable gate electrodes, including tuneable work function systems, is a major challenge for future CMOS device scaling.

Solution and Outcome:

Ilika and Applied Materials, a global leader in providing innovative equipment, services and software to enable the manufacture of advanced semiconductor products, worked together to develop new metal alloy as the metal gate suitable with  high k dielectrics for CMOS applications.  

By synthesising libraries of metal oxide silicon capacitors (MOSCAPs) using Ilika’s high throughput physical vapour deposition (HT-PVD) technology and performing the characterisation in an automated fashion, the process of screening the metal alloy materials to achieve the work function of interest was accelerated significantly.

This high throughput approach to materials synthesis coupled with high throughput characterisation and screening meant that Ilika and Applied materials could optimise the materials with respect to a desired property in a much shorter timeframe. This approach also enabled the study in more detail of the material and electrical behaviours of interesting compositions.

The result of the project was a systematic  study and the development of  an array of hafnium silicon metal alloy material candidates as metal gates that are compatible with high-k dielectrics and the effective metal work-function of each material was evaluated and showed tunabilitiy from 4.5 to 4.0eV, suitable for n-channel metal-oxide-semiconductor (NMOS) applications.

Further details of some of the work undertaken in this collaboration has been published in this AIP paper:

Copyright 2013, American Institute of Physics. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Institute of Physics.

The article appeared in JAP 113 3 034107 and may be found at http://scitation.aip.org/content/aip/journal/jap/113/3/10.1063/1.4780447.

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